1. Field of the Invention
The present invention generally relates to a calibration plate used in the manufacturing of semiconductor devices, and particularly relates to a calibration plate for circuit size measurement apparatuses.
2. Description of the Related Art
In the manufacturing of semiconductor devices, size measurement apparatuses are used to measure the width of circuit wires in semiconductor devices. As the circuit density of semiconductor devices increases as a result of technological development, the width of wires used in wiring patterns becomes increasingly narrower. In response, size measurement apparatuses need to be updated accordingly. When a new size measurement apparatus is installed, calibration needs to be made as to whether values measured by the newly installed size measurement apparatus are correct. A calibration pattern used for this purpose is required to be highly accurate.
Calibration plates are typically made by fabricating metal patterns of chrome, an oxide film, aluminum, or the like on glass substrates.
FIG. 1 is an illustrative drawing showing an example of a calibration plate. A pattern in which a bar (black) 10 and a space (white) 11 are repeated as shown in FIG. 1 is fabricated by metal such as chrome on a glass substrate. With respect to this metal pattern, a pitch P, a bar width B, and a space width S are defined by their physical sizes, which may be represented in micrometers, for example.
The calibration pattern on a calibration plate is made by patterning metal such as chrome on the glass substrate. The pitch P, the bar width B, and the space width S are defined by exposure data, which is the design data used for producing calibration patterns. However, the bar width B and the space width S are affected by processing conditions relating to exposure, development, etching, etc., at the time of producing an actual calibration pattern.
The pitch P is always equal to that specified by the exposure data despite variations of processing conditions. When a calibration pattern is used, however, the bar width B or the space width S is typically used, and the pitch P of its own is not used.
Accordingly, there is error in calibration patterns that are used for the purpose of calibrating size measurement apparatuses. The presence of error may not matter if the bar width B and the space width S are accurately measured, which is unfortunately not an easy task. In order to measure an actual pattern, an electron microscope or a coordinate measurement apparatus may be used. Each of an electron microscope and a coordinate measurement apparatus, however, may create undesirable value changes in the detected bar width B and the detected space width S depending on the way a slice level is set. The slice level is a threshold for slicing a pattern that is formed by detecting reflected electrons or the like.
Accordingly, a conventional calibration pattern offers an accurate pitch P, but provides the bar width B and the space width S for which accurate dimensions are unknown.
Accordingly, there is a need for a calibration plate that offers a bar width and a space width that are accurately defined.
It is a general object of the present invention to provide a calibration plate that substantially obviates one or more of the problems caused by the limitations and disadvantages of the related art.
It is another and more specific object of the present invention to provide a calibration plate that offers a bar width and a space width that are accurately defined.
In order to achieve the above objects according to the present invention, a calibration plate includes a first pattern in which bars and spaces are repeated, and a second pattern in which bars having an identical width to the spaces of the first pattern and spaces having an identical width to the bars of the first pattern are repeated, wherein said first pattern and said second pattern adjoin each other, and the bars and spaces of the first pattern and the bars and spaces of the second pattern are staggered.
In the calibration plate as described above, at least two lines of patterns are provided, each of which includes bars and spaces repeated therein, and the bars and the spaces in these lines are arranged such that the bars and the spaces are staggered across the line boundary, i.e., the bar positions of one of the lines corresponds to the space positions of the other one of the lines. With respect to the calibration pattern produced in such a fashion, an electron microscope or a coordinate measurement apparatus is used to check whether the edges of bars and spaces are aligned across the line boundary. This makes it possible to accurately identify the width of bars and spaces in addition to the pitch size.
According to another aspect of the present invention, the calibration pattern as described above is such that said first pattern and said second pattern are formed on a reticle or a wafer, which has a product pattern formed thereon, and is used for product manufacturing.
In the calibration plate as described above, the calibration pattern may be formed on product reticles or wafers that are actually used for manufacturing products, which makes it easier to calibrate a size measurement apparatus during the process steps of manufacturing actual products.
According to another aspect of the present invention, a method of producing a calibration plate includes the steps of providing exposure data of a calibration pattern including a first pattern in which bars and spaces are repeated, and a second pattern in which bars having an identical width to the spaces of the first pattern and spaces having an identical width to the bars of the first pattern are repeated, wherein said first pattern and said second pattern adjoin each other, and the bars and spaces of the first pattern and the bars and spaces of the second pattern are staggered, performing an exposure process multiple times by using the exposure data under different exposure conditions, and producing a calibration plate having a plurality of the calibration patterns formed thereon.
In the method described above, the exposure process using the exposure data is performed multiple times by changing exposure dosages or by changing the sizes of bars and spaces of the exposure data, thereby producing the calibration plate having the plurality of calibration patterns. With respect to the plurality of calibration patterns formed under different conditions, an electron microscope or a coordinate measurement apparatus is used to check whether edges of the bars and spaces are aligned. In this manner, a calibration pattern having aligned pattern edges is identified and selected from the plurality of calibration patterns, thereby providing a proper calibration pattern.
According to another aspect of the present invention, the method as described above is such that the producing the calibration plate includes the steps of producing a reticle plate having a plurality of calibration patterns formed thereon, and performing an exposure process by using the reticle plate as a mask to produce the calibration plate having a calibration pattern that is reduced in size compared with the calibration patterns formed on the reticle.
In the method as described above, the reticle having the calibration pattern is produced first, and, then, a size reduced image of the calibration pattern is projected and copied onto the calibration plate by use of a repeater, a stepper, or the like. In this manner, the pattern is formed on the repeater reticle by using relatively large physical dimensions, and, then, this pattern is reduced in size to form the actual calibration plate. This makes it possible to produce a calibration pattern having higher precision.
According to another aspect of the present invention, a method of producing a semiconductor device includes the steps of producing a calibration plate including a first pattern in which bars and spaces are repeated, and a second pattern in which bars having an identical width to the spaces of the first pattern and spaces having an identical width to the bars of the first pattern are repeated, wherein said first pattern and said second pattern adjoin each other, and the bars and spaces of the first pattern and the bars and spaces of the second pattern are staggered, calibrating a size measurement apparatus by using the calibration plate, and measuring the semiconductor device by using the calibrated size measurement apparatus.
In the method as described above, the size measurement apparatus is calibrated by use of a highly accurate calibration plate, thereby making it possible to produce a semiconductor device through a highly precise manufacturing process.